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STMICROELECTRONICS [STMicroelectronics] VERY LOW DROP VOLTAGE REGULATORS WITH INHIBIT
• High Performance 16-bit CPU with 5-Stage Pipeline C 25 ns Instruction Cycle Time at 40 MHz CPU Clock (Single-Cycle Execution) C 1-Cycle Multiplication (16 16 bit), Background Division (32 / 16 bit) in 21 Cycles C 1-Cycle Multiply-and-Accumulate (MAC) Instructions C Enhanced Boolean Bit Manipulation Facilities C Zero-Cycle Jump Execution C Additional Instructions to Support HLL and Operating Systems C Register-Based Design with Multiple Variable Register Banks C Fast Context Switching Support with Two Additional Local Register Banks C 16 Mbytes Total Linear Address Space for Code and Data C 1024 Bytes On-Chip Special Function Register Area (C166 Family Compatible) • 16-Priority-Level Interrupt System with up to 75 Sources, Sample-Rate down to 50 ns • 8-Channel Interrupt-Driven Single-Cycle Data Transfer Facilities via Peripheral Event Controller (PEC), 24-Bit Pointers Cover Total Address Space • Clock Generation via on-chip PLL (factors 1:0.15 …1:10), or via Prescaler (factors 1:1 …60:1) • On-Chip Memory Modules C 2 Kbytes On-Chip Dual-Port RAM (DPRAM) C 2 Kbytes On-Chip Data SRAM (DSRAM) C 2 Kbytes On-Chip Program/Data SRAM (PSRAM) C 128 Kbytes On-Chip Program Memory (Flash Memory or Mask ROM) • On-Chip Peripheral Modules C 14-Channel A/D Converter with Programmable Resolution (10-bit or 8-bit) and Conversion Time (down to 2.55 µs or 2.15 µs) C Two 16-Channel General Purpose Capture/Compare Units (12 Input/Output Pins) C Capture/Compare Unit for flexible PWM Signal Generation (CAPCOM6) (3/6 Capture/Compare Channels and 1 Compare Channel) C Multi-Functional General Purpose Timer Unit with 5 Timers C Two Synchronous/Asynchronous Serial Channels (USARTs) C Two High-Speed-Synchronous Serial Chann
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