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Two programmable power-down modes (STBYPD, FULLPD) provide low-current shutdown between con- versions. In STBYPD mode, the reference buffer remains active, eliminating start-up delays. The MAX196/MAX198 employ a standard microproces- sor (µP) interface. A three-state data I/O port is config- ured to operate with 16-bit data buses, and data- access and bus-release timing specifications are com- patible with most popular µPs. All logic inputs and out- puts are TTL/CMOS compatible. These devices are available in 28-pin DIP, wide SO, SSOP (55% smaller in area than wide SO), and ceramic SB packages. For 8+4 bus interface, see the MAX197 and the MAX199 data sheets. An evaluation kit will be available after December 1995 (MAX196EVKIT-DIP).

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