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Parameters
Quad 2-input AND Gate
in the buffer register. The Data Ready flag goes low (0) when the most significant byte (high byte) is read. If the old word is not read, or if only the least significant byte (low byte) is read, Data Ready is not reset. The next conversion output will overwrite the data latch when the conversion is complete. The Data Ready flag remains high. Refer to timing diagrams in the Specifications section.
Supply information for model number 74LS09DC  |
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| Part Number |
Mfg |
Pack |
D/C |
Qty |
Description |
Inquiry |
| 74LS09DC |
NS |
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|
690 |
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