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Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs
The EBD10RD4ADFA is 128M words 72 bits, 1 rank Double Data Rate (DDR) SDRAM registered module, mounting 18 pieces of 512M bits DDR SDRAM sealed in TSOP package. Read and write operations are performed at the cross points of the CK and the /CK. This high-speed data transfer is realized by the 2-bit prefetch-pipelined architecture. Data strobe (DQS) both for read and write are available for high speed and reliable data bus design. By setting extended mode register, the on-chip Delay Locked Loop (DLL) can be set enable or disable. This module provides high density mounting without utilizing surface mount technology.Decoupling capacitors are mounted beside each TSOP on the module board.
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